The third RISC-V workshop, held in early 2016, saw the official establishment of the RISC-V Foundation. Technolution is one of the sixteen founding members, alongside companies such as Google, HP and Oracle. The RISC-V Foundation will manage the RISC-V standard and stimulate the adaptation of RISC-V in the market. RISC-V is a new open standard that constitutes an alternative to ARM and MIPS and others. This gives RISC-V the potential to become the ‘Linux of embedded hardware platforms’.
RISC-V is a new instruction set architecture that establishes the interface between the software and the processor. It is a ground-breaking alternative to ARM, MIPS and other processor architectures. RISC-V is the result of years of research by the University of California, Berkeley. This research was supported by David Patterson, one of the founders of modern processor architectures.
RISC-V is an open standard that is suited for the industry and the academic world. This stimulates widespread use of the hardware and software ecosystem that will develop around this standard. We therefore believe that RISC-V has the potential to become as significant to embedded hardware platforms as Linux is to embedded software. From cheap processors specifically for IoT up to and including high-end processors for specific fields of application. All these variants would be able to draw on a large ecosystem of software and tools.
High safety and high security
Technolution is developing a RISC-V processor core specifically geared to high-security and high-safety applications, such as aerospace and government or medical applications. This processor is being designed so as to make it immune to so-called single event upsets (SEUs). These are bit errors that can occur as a result of cosmic radiation, or through conscious manipulation by an attacker. The occurrence of SEUs in a processor can have considerable impact on execution of the program code. High-safety and high-security applications therefore need to be well-protected against this kind of error.
Technolution and the RISC-V Foundation
By joining the RISC-V Foundation, we are supporting further development of the RISC-V standard. This standard lays a sound foundation for the development of an extensive ecosystem that will benefit the users of our RISC-V processor.
For more information about the RISC-V Foundation or our RISC-V developments, please contact our domain architect, Jonathan Hofman.